User Tools

Site Tools


tutorials:vec:system_schematic_basics

This is an old revision of the document!


Work on following article or section is in progress

System Schematic Basics

The system schematic is used to illustrate the electrical components (e.g. ECUs, sensors or switches) in a vehicle electrical system and their connections to each other on an electrological level without physical realization details. In many companies the system schematic is specific for an individual system and not an individual vehicle variant.
The figure ## below shows an example of such a system schematic with four components (MX1.1, MX3.1, MX3.2 and E1.1), which are connected to each other in some way. On the connection lines the potential names can be found. Furthermore the component E1.1 is connected to additional elements on another sheet / in another system, which is suggested by the arrow on the very bottom. This is explained in more details in the section Partial Systems.

Fig. ##: Simple System Schematic Example

To represent a system schematic in the VEC the ConnectionSpecification and its subelements are used. E/E-Components (in some ECAD Systems called Block) are represented by ComponentNodes. A ComponentNode is a node where an electrological component is located. It is a representative for an element in the electric system, e.g. an actuator, a sensor, an ECU. figure ## contains the representation as VEC classes of the system schematic shown in figure ##. The ComponentPort (Pins) of a ComponentNode are grouped into Connectors / Slots with the help of ComponentConnectors. In figure ## the connectors are only represented implicitly by the prefix “A” to the Pin-Number.
Even if the system schematic in this example only shows pins which are connected to other pins (of other components), the VEC representation of the component (ComponentNode) is explicitly allowed to contain ComponentPorts for unused pins. For example a component with 5 pins where just pin no. 1 and 5 are connected in some way may contain ComponentPorts for the pins 2 - 4 (but is not required to). This underlines that these pins do physicaly exists. There is no need of a reference from a Connection to one of the ComponentPorts via a ConnectionEnd.

Fig. ##: System Schematic Class Diagram

The following XML listing contains the component nodes and connection from the example above.

<Specification xsi:type="vec:ConnectionSpecification" id="id_connect_spec_2506">
            <Identification>ConSpec_V..58L..</Identification>
            <ComponentNode id="id_comp_node_2507">
                <Identification>MX1.1</Identification>
                <ComponentConnector id="id_component_connector_2509">
                    <Identification>A</Identification>
                    <ComponentPort id="id_comp_port_2510">
                        <Identification>1</Identification>
                    </ComponentPort>
                </ComponentConnector>
            </ComponentNode>
            <ComponentNode id="id_comp_node_2513">
                <Identification>MX3.1</Identification>
                <ComponentConnector id="id_component_connector_2518">
                    <Identification>A</Identification>
                    <ComponentPort id="id_comp_port_2519">
                        <Identification>1</Identification>
                    </ComponentPort>
                </ComponentConnector>
            </ComponentNode>
            <ComponentNode id="id_comp_node_2521">
                <Identification>MX3.2</Identification>
                <ComponentConnector id="id_component_connector_2523">
                    <Identification>A</Identification>
                    <ComponentPort id="id_comp_port_2524">
                        <Identification>1</Identification>
                    </ComponentPort>
                </ComponentConnector>
            </ComponentNode>
            <ComponentNode id="id_comp_node_2533">
                <Identification>E1.1</Identification>
                <ComponentConnector id="id_component_connector_2535">
                    <Identification>A</Identification>
                    <ComponentPort id="id_comp_port_2538">
                        <Identification>1</Identification>
                    </ComponentPort>
                </ComponentConnector>
            </ComponentNode>
            <Connection id="id_connection_2784">
                <Identification>V..58L..</Identification>
                <ConnectionEnd id="id_conn_end_2785">
                    <Identification>MX1.1-A1</Identification>
                    <ConnectedComponentPort>id_comp_port_2510</ConnectedComponentPort>
                </ConnectionEnd>
                <ConnectionEnd id="id_conn_end_2786">
                    <Identification>MX3.1-A1</Identification>
                    <ConnectedComponentPort>id_comp_port_2519</ConnectedComponentPort>
                </ConnectionEnd>
                <ConnectionEnd id="id_conn_end_2787">
                    <Identification>MX3.2-A1</Identification>
                    <ConnectedComponentPort>id_comp_port_2524</ConnectedComponentPort>
                </ConnectionEnd>
            </Connection>
            [...]
        </Specification>
        

Potential Nodes

As mentioned before, the level of abstraction of the system schematic in the VEC (represented by the ConnectionSpecification) contains only the electrological design and no physical design of the wiring harness. Therefore, the black dots (circled in red) in the graphical example figure ## have only a layouting purpose and do not represent a technical design decision (e.g. to place a splice on this spot).

The expressed engineering intention is only that the connected pins (all “A1”) have the same potential (are connected in some way). The decision about a technical realization (e.g. splice, multicrimp, single wires) can not be made is most cases at the stage of a system schematic, because a technical realization depends on concrete variant combinations and might be even different for different variants (see section Wiring) or is can be unnecessary, because in a reduced 100% variant, there might be just two of the three components and a realization with a single wire would be possible. As the VEC does not represent the graphical layout of documents these nodes have no representation in VEC.

If the system schematic should explicitly contain the engineering intention of a star like connection topology (e.g. with a splice or a potential distributor) the center of this “star” must be explicitly represented with an individual ComponentNode

Fig. ##: Simple System Schematic Example


Partial Systems

During the development of individual systems or sub systems for a vehicle the corresponding system schematic is often incomplete (partial). This situation arises from the fact, that most systems depend on some kind of infrastructure of the integrated overall vehicle system (e.g. power, ground or bus connections), which is only a available in the context of the complete vehicle. In figure ## such a link to an unspecified infrastructure is represented by the down arrow, in the following sections this is called an open link.

To create a fully functional system, a partial system must be merged / combined with other partial systems. In this process matching open links are connected (and thus removed) in order to create complete overall system. In figure ## this is illustrated by adding a second partial system schematic (framed in red) to the original example from figure ##. The resulting overall system schematic of such a merge process would just contain a simple connection between E.1.1 and M31.

Fig. ##: System Schematic Example with two parts

Fig. ##: Open Enumeration with OpenLink

The mapping of this advanced schematic example into the VEC context it is the following (see figure ##).

  1. To maintain the logical grouping of each partial system schematic, the content of each is contained in its own DocumentVersion with a single ConnectionSpecification in the same VecContent.
  2. The open link is represented by a “virtual” ComponentNode. Its naming is arbitrary and shall be choosen in a way, that a merge algorithm has the required information. For the clarity of the example it is here named GROUND. Depending on the used merge algorithm the name can be irrelevant if the merge algorithm for example only requires signal information.
  3. The “virtual” component node shall be marked with the ComponentNodeType literal OpenLink (see figure ## on the right).

figure ## shows the extended diagram with the ComponentNode “GROUND”. As you can see the ComponentNode is marked with the node type “OpenLink” (red mark) to clarify that this component is NOT part of the system schematic but components from the plan DO HAVE a connection to it.

Caution: The strategy and algorithm to merge partial systems if individual for the different ECAD systems and development processes. The VEC does not define an algorithm or requires a specific strategy. The VEC only the means to store and exchange the information that is required by those algorithms. When merging the definition of these partial systems together into one vehicle system, it is mandatory to resolve these open links and replace them by determined ComponentNode elements or Connection:

  1. Case 1: The open link component node is replaced by a real component with the required connectivity.
  2. Case 2: If multiple real component nodes have connections to different open link component nodes, the open link nodes can be merged to a single connection among the real component nodes.

Note: It is possible to reference a ComponentPort from a Connection/ConnectionEnd even if they are contained in different DocumentVersion.

Fig. ##: Advanced System Schematic Example

The following listing shows the additional ComponentNode as XML.

<Specification xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:type="ns2:ConnectionSpecification" id="id_connect_spec_2506">
            <Identification>ConSpec_V..58L..</Identification>
            [...]
            <ComponentNode id="id_comp_node_2533">
                <Identification>E1.1</Identification>
                <ComponentConnector id="id_component_connector_2535">
                    <Identification>A</Identification>
                    <ComponentPort id="id_comp_port_2538">
                        <Identification>1</Identification>
                    </ComponentPort>
                </ComponentConnector>
            </ComponentNode>
            <ComponentNode id="id_comp_node_2634">
                <Identification>GROUND</Identification>
                <ComponentNodeType>OpenLink</ComponentNodeType>
                <ComponentConnector id="id_component_connector_2636">
                    <Identification>A</Identification>
                    <ComponentPort id="id_comp_port_2639">
                        <Identification>1</Identification>
                    </ComponentPort>
                </ComponentConnector>
            </ComponentNode>
            [...]
            <Connection id="id_connection_2885">
                <Identification>GROUND..SYS_055A</Identification>
                <ConnectionEnd id="id_conn_end_2886">
                    <Identification>E1.1-A1</Identification>
                    <ConnectedComponentPort>id_comp_port_2538</ConnectedComponentPort>
                </ConnectionEnd>
                <ConnectionEnd id="id_conn_end_2887">
                    <Identification>GROUND-A1</Identification>
                    <ConnectedComponentPort>id_comp_port_2639</ConnectedComponentPort>
                </ConnectionEnd>
            </Connection>
        </Specification>
        
tutorials/vec/system_schematic_basics.1564740027.txt.gz · Last modified: 2019/08/02 12:00 by 4soft.fehlmann