Specification

Hierarchical Topologies Hierarchical topologies are a versatile concept to create harness topologies that have an advanced structural design. For historical reasons, the semantics defined by the VEC for topologies are quite strict and simple, yet sufficient for most cases of traditional wiring harnesses.

Bending Restrictions A bending restriction defines restrictions on the bendability of a path in the topology. See TopologyBendingRestriction for a detailed description.

Bending Restrictions A bending restriction defines restrictions on the bendability of a path in the topology. See TopologyBendingRestriction for a detailed description.

Bending Restrictions A bending restriction defines restrictions on the bendability of a path in the topology. See TopologyBendingRestriction for a detailed description.

Bending Restrictions A bending restriction defines restrictions on the bendability of a path in the topology. See TopologyBendingRestriction for a detailed description.

Bending Restrictions A bending restriction defines restrictions on the bendability of a path in the topology. See TopologyBendingRestriction for a detailed description.

Wire Grouping Specification A WireGroupingSpecification is used to describe grouping requirements (e.g. twisted pair) in a certain context of usage (e.g. in the context of a 150% harness description). For this, a WireGroupingSpecification is a container for various WireGroupings.

Wire Grouping Specification A WireGroupingSpecification is used to describe grouping requirements (e.g. twisted pair) in a certain context of usage (e.g. in the context of a 150% harness description). For this, a WireGroupingSpecification is a container for various WireGroupings.

Pin Wire Mapping A PinWireMappingSpecification can be used to create variance free mappings between a wire (represented by the contact point) and the pin of an E/E component. This is a possibility to create a shortcut in the model between a wire and its connected E/E-component (e.

Pin Wire Mapping A PinWireMappingSpecification can be used to create variance free mappings between a wire (represented by the contact point) and the pin of an E/E component. This is a possibility to create a shortcut in the model between a wire and its connected E/E-component (e.