Specification for the definition of a wire. This can either be a complex multicore wire or a normal single core. In the VEC a wire is defined by one WireElement, which may be …
Instances of Wires The diagram shows the mapping between the part master data of a wire (partly displayed on the left side) and the instance specific information (displayed on the …
Specification for the definition of a wire. This can either be a complex multicore wire or a normal single core. In the VEC a wire is defined by one WireElement, which may be …
Instances of Wires The diagram shows the mapping between the part master data of a wire (partly displayed on the left side) and the instance specific information (displayed on the …
Specification for the definition of a wire. This can either be a complex multicore wire or a normal single core. In the VEC a wire is defined by one WireElement, which may be …
Instances of Wires The diagram shows the mapping between the part master data of a wire (partly displayed on the left side) and the instance specific information (displayed on the …