Architectural Layer
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This page or section resolves #573
Basic Architectural Layer
The Architectural Layer is the highest abstraction layer for describing electrological aspects in the VEC. It focuses on defining the connectivity between components without specifying the physical realization of that connectivity. This layer is particularly useful for early design phases, where the overall system architecture needs to be established without delving into implementation details.
The figure above illustrates a simple sketch of a “Power Window (Driver Side)” system in the architectural layer. It shows the main components involved (Body Controller, Door Module Driver, and Power Window Engine Driver) and the communication links between them. However, it does not specify how these connections are physically realized (e.g., electrical potentials, wire types, connectors). The instantiation of this sketch in the VEC is shown in the figure below.
The VEC instantiation in this example contains slightly more detail than the sketch, but still refrains from defining physical realization aspects. The VEC elements used to describe the Architectural Layer are contained in the NetSpecification. Each E/E Component is represented by a NetworkNode. The communication links between the components are represented by three Nets. A Net is the usage of a NetType, e.g., “CAN Bus” or “HALL”, defining the technology used for communication. The Net defines a specific instance of this technology in the system, e.g., “Body-CAN Bus” or “HALL for Power Window Driver Side”.
The XML representation of the above example within the NetSpecification is shown below:
<?xml version="1.0" ?>
<vec:VecContent xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vec="http://www.prostep.org/ecad-if/2011/vec" id="Content_00000" xsi:schemaLocation="">
<VecVersion>2.2.0</VecVersion>
<GeneratingSystemName>VEC Samples</GeneratingSystemName>
<DateOfCreation>2025-11-03T14:05:24.068903900Z</DateOfCreation>
<GeneratingSystemVersion>0.0.1</GeneratingSystemVersion>
<DocumentVersion id="DocumentVersion_00001">
<CompanyName>Acme Inc.</CompanyName>
<DocumentNumber>1234567</DocumentNumber>
<DocumentType>NetworkArchitecture</DocumentType>
<DocumentVersion>a</DocumentVersion>
<Specification xsi:type="vec:NetSpecification" id="NetSpecification_00002">
<Identification>NETWORK</Identification>
<Net id="Net_00003">
<Identification>PWED-Engine</Identification>
<NetType>NetType_00006</NetType>
<NetworkPort>NetworkPort_00017 NetworkPort_00014</NetworkPort>
</Net>
<Net id="Net_00004">
<Identification>HALL</Identification>
<NetType>NetType_00007</NetType>
<NetworkPort>NetworkPort_00016 NetworkPort_00013</NetworkPort>
</Net>
<Net id="Net_00005">
<Identification>Body-CAN</Identification>
<NetType>NetType_00008</NetType>
<NetworkPort>NetworkPort_00010 NetworkPort_00012</NetworkPort>
</Net>
<NetType id="NetType_00006">
<Identification>12V-Power</Identification>
<SignalType>Energy</SignalType>
</NetType>
<NetType id="NetType_00007">
<Identification>HALL</Identification>
<SignalType>Information</SignalType>
<SignalInformationType>Analog</SignalInformationType>
</NetType>
<NetType id="NetType_00008">
<Identification>CAN</Identification>
<SignalType>Information</SignalType>
<SignalSubType>CAN</SignalSubType>
<SignalInformationType>Digital</SignalInformationType>
</NetType>
<NetworkNode id="NetworkNode_00009">
<Identification>BCM</Identification>
<Port id="NetworkPort_00010">
<Identification>CAN1</Identification>
<NetType>NetType_00008</NetType>
</Port>
</NetworkNode>
<NetworkNode id="NetworkNode_00011">
<Identification>DMD</Identification>
<Port id="NetworkPort_00012">
<Identification>CAN</Identification>
<NetType>NetType_00008</NetType>
</Port>
<Port id="NetworkPort_00013">
<Identification>PWED-HALL</Identification>
<NetType>NetType_00007</NetType>
</Port>
<Port id="NetworkPort_00014">
<Identification>PWED-Engine</Identification>
<NetType>NetType_00006</NetType>
</Port>
</NetworkNode>
<NetworkNode id="NetworkNode_00015">
<Identification>PWED</Identification>
<Port id="NetworkPort_00016">
<Identification>HALL</Identification>
<NetType>NetType_00007</NetType>
</Port>
<Port id="NetworkPort_00017">
<Identification>Engine</Identification>
<NetType>NetType_00006</NetType>
</Port>
</NetworkNode>
</Specification>
</DocumentVersion>
</vec:VecContent>
Transition to System Schematic Layer
The system schematic layer is one abstraction level below the architectural layer. It adds more detail to the connectivity defined in the architectural layer by differentiating the electrical potentials and connections between components, while still not delving into physical realization details, e.g. wire colors or cross sections. More details regarding the system schematic layer can be found in the System Schematic Layer guideline. This transition is illustrated in the figure below.
To maintain clarity, we build upon the previous example of the architectural layer, but with a focus on just the HALL network and its two participants, the DMD and PWED. A HALL-sensor signal typically consists of three electrical potentials: a power supply voltage, a ground reference, and the actual signal output. In the architectural layer, this entire communication link is represented by a single Net named “PWED-HALL”. However, in the system schematic layer, this link is broken down into three distinct Connections, each representing one of the electrical potentials involved in the HALL communication. Also note, that the ComponentNode has a ComponentPort for each electrical potential. These ports are grouped under a ComponentConnector.
The figure belows shows the VEC instantiation of the system schematic layer and the tracability into the network layer, but only for the PWED side and a single connection in order to avoid cluttering of the diagram. Also note that the figure contains Signals as the pyhsical pendants of the NetType.
The XML representation of the above example within the ConnectionSpecification is shown below. This is a partial extract focusing on the connections related to the HALL network and extends the previous XML example for the architectural layer:
[...]
<Specification xsi:type="vec:SignalSpecification" id="SignalSpecification_00018">
<Identification>SIGNALS</Identification>
<Signal id="Signal_00019">
<Identification>PWED_HALL_GROUND</Identification>
<SignalType>Ground</SignalType>
<NetType>NetType_00007</NetType>
</Signal>
<Signal id="Signal_00020">
<Identification>PWED_HALL_IN</Identification>
<SignalType>Energy</SignalType>
<NetType>NetType_00007</NetType>
</Signal>
<Signal id="Signal_00021">
<Identification>PWED_HALL_OUT</Identification>
<SignalInformationType>Analog</SignalInformationType>
<SignalType>Information</SignalType>
<NetType>NetType_00007</NetType>
</Signal>
</Specification>
<Specification xsi:type="vec:ConnectionSpecification" id="ConnectionSpecification_00022">
<Identification>SCHEMATIC</Identification>
<ComponentNode id="ComponentNode_00023">
<Identification>DMD</Identification>
<NetworkNode>NetworkNode_00011</NetworkNode>
<ComponentConnector id="ComponentConnector_00024">
<Identification>A</Identification>
<ComponentPort id="ComponentPort_00025">
<Identification>1</Identification>
<NetworkPort>NetworkPort_00013</NetworkPort>
</ComponentPort>
<ComponentPort id="ComponentPort_00026">
<Identification>2</Identification>
<NetworkPort>NetworkPort_00013</NetworkPort>
</ComponentPort>
<ComponentPort id="ComponentPort_00027">
<Identification>3</Identification>
<NetworkPort>NetworkPort_00013</NetworkPort>
</ComponentPort>
</ComponentConnector>
</ComponentNode>
<ComponentNode id="ComponentNode_00028">
<Identification>PWED</Identification>
<NetworkNode>NetworkNode_00015</NetworkNode>
<ComponentConnector id="ComponentConnector_00029">
<Identification>A</Identification>
<ComponentPort id="ComponentPort_00030">
<Identification>1</Identification>
<NetworkPort>NetworkPort_00016</NetworkPort>
<Signal>Signal_00019</Signal>
</ComponentPort>
<ComponentPort id="ComponentPort_00031">
<Identification>2</Identification>
<NetworkPort>NetworkPort_00016</NetworkPort>
<Signal>Signal_00020</Signal>
</ComponentPort>
<ComponentPort id="ComponentPort_00032">
<Identification>3</Identification>
<NetworkPort>NetworkPort_00016</NetworkPort>
<Signal>Signal_00021</Signal>
</ComponentPort>
</ComponentConnector>
</ComponentNode>
<Connection id="Connection_00033">
<Identification>PWED_HALL_GROUND</Identification>
<Net>Net_00004</Net>
<Signal>Signal_00019</Signal>
<ConnectionEnd id="ConnectionEnd_00034">
<Identification>PWED.A.1</Identification>
<IsExternalEnd>true</IsExternalEnd>
<ConnectedComponentPort>ComponentPort_00030</ConnectedComponentPort>
</ConnectionEnd>
<ConnectionEnd id="ConnectionEnd_00035">
<Identification>DMD.A.1</Identification>
<IsExternalEnd>true</IsExternalEnd>
<ConnectedComponentPort>ComponentPort_00025</ConnectedComponentPort>
</ConnectionEnd>
</Connection>
<Connection id="Connection_00036">
<Identification>PWED_HALL_IN</Identification>
<Net>Net_00004</Net>
<Signal>Signal_00020</Signal>
<ConnectionEnd id="ConnectionEnd_00037">
<Identification>PWED.A.2</Identification>
<IsExternalEnd>true</IsExternalEnd>
<ConnectedComponentPort>ComponentPort_00031</ConnectedComponentPort>
</ConnectionEnd>
<ConnectionEnd id="ConnectionEnd_00038">
<Identification>DMD.A.2</Identification>
<IsExternalEnd>true</IsExternalEnd>
<ConnectedComponentPort>ComponentPort_00026</ConnectedComponentPort>
</ConnectionEnd>
</Connection>
<Connection id="Connection_00039">
<Identification>PWED_HALL_OUT</Identification>
<Net>Net_00004</Net>
<Signal>Signal_00021</Signal>
<ConnectionEnd id="ConnectionEnd_00040">
<Identification>PWED.A.3</Identification>
<IsExternalEnd>true</IsExternalEnd>
<ConnectedComponentPort>ComponentPort_00032</ConnectedComponentPort>
</ConnectionEnd>
<ConnectionEnd id="ConnectionEnd_00041">
<Identification>DMD.A.3</Identification>
<IsExternalEnd>true</IsExternalEnd>
<ConnectedComponentPort>ComponentPort_00027</ConnectedComponentPort>
</ConnectionEnd>
</Connection>
</Specification>
[...]